Program point of view understanding of ADC

  • ADC conversion time

  • Conversion time of ADC depend upon clock of crystal oscillator through which it gets clock, in modern microcontroller, provided separately in Ksps (Kilo sample per second). 
  • ADC requires an input clock of frequency less than 200 KHz for maximum accuracy
  • Lower the frequency higher the precision
  • In AVR first conversion take 25 ADC clock cycle to initialize analog circuitory and pass the sample and hold circuit
  • Then next each consecutive conversion take  13 ADC clock cycle

 

  • ADC connection to ATmega32

 ADC CIRCUIT

  • To get better accuracy of ADC, we must provide stable voltage source to AVcc.
  • And we done throut it by 100nF capacitors and inductor of 10 uH.

 

  • Register associated in programming of ADC are

ADMUX

 ADMUX

  • ADLAR – ADC left adjust result,In ATmega32 ADC is of 10 bit which mean result is of 10 bit. So it can’t see in single byte register and there for there is two register of each single byte named as ADCH (high byte) and ADCL (low byte). In this 16 bit only 10 bit are used rest are not used. By ADLAR bit we can use this 10 bit of left most or right most.
    If ADLAR = 1 , 10 bit are shifted left  in ADCH and ADCL
    If ADLAR = 0 , 10 bit are shifted right in ADCH and ADCL

REFS1

REFS0

Vref selection bit

0

0

AREF pin set externally

0

1

AVcc pin same as Vcc

1

0

Reserved

1

1

Internal 2.56 V (internally derived from Vcc)

 

 

 

 

 

  • MUX  (DIFFERENTIAL  INPUT TO USE OPAMP GAIN)

Mux4 to Mux0

Differential input +

Differential input –

Gain

01001

ADC1

ADC0

10X

01011

ADC1

ADC0

200X

01101

ADC3

ADC2

10X

01111

ADC3

ADC2

200X

10000

ADC0

ADC1

1X

10010

ADC2

ADC1

1X

10011

ADC3

ADC1

1X

10100

ADC4

ADC1

1X

10101

ADC5

ADC1

1X

10110

ADC6

ADC1

1X

10111

ADC7

ADC1

1X

11000

ADC0

ADC2

1X

11001

ADC1

ADC2

1X

11011

ADC3

ADC2

1X

11100

ADC4

ADC2

1X

11101

ADC5

ADC2

1X

 

 

 

 

 

 

 

 

 

 

 

  • MUX  (SINGLE  ENDED)- in differential mux select, we can also control a gain of op-amp upto 200x. in this mode , positive input of the opamp to ve ADC0 to ADC7 and negative input of the opamp be ADC0, ADC1 and ADC2. And in this mode of operation we can use single channel of  ADC as input and common ground as ground.

Mux4 to Mux0

Single ended input

00000

ADC0

00001

ADC1

00010

ADC2

00011

ADC3

00100

ADC4

00101

ADC5

00110

ADC6

00111

ADC7

 

 

ADCSRA

 

 ADCSRA

  • ADEN  = 1, mean  ADC enable and ADEN = 0, mean ADC disable
  • ADSC  = 1, mean  ADC start conversion and ADEN = 0 mean ADC conversion disable
  • ADATE  =  ADC auto trigger enable 
  • ADIF = ADC interrupt flag. 1 mean conversion complete
  • ADIE = ADC interrupt enable when 1.
  • ADPS

ADPS2

ADPS1

ADPS0

ADC clock

0

0

0

Reserved

0

0

1

Clk / 2

0

1

0

Clk / 4

0

1

1

Clk / 8

1

0

0

Clk / 16

1

0

1

Clk / 32

1

1

0

Clk / 64

1

1

1

Clk / 128